ECE 3056: Architecture, Concurrency, and Energy in Computation

ECE 3056: Architecture, Concurrency, and Energy in Computation

Prerequisites: ECE 2035, ECE 2031

Course Objective: This course introduces the basic organizational principles of the major components of a processor – the core, memory hierarchy, and the I/O subsystem. Students gain an understanding of the sources of performance and energy dissipation in modern processors and learn the multiple forms and levels of parallelism that have been employed to sustain performance improvements in the industry. Assignments using architecture‐level simulators enable the students to explore the operation and tradeoffs in performance and energy and reinforce the concepts learned in the class room. In particular the course addresses some basic microarchitecture support for operating systems. This is expanded into a study essential mechanisms of process generation, concurrency, and high level coverage of the OS management of the I/O subsystem and network stacks.

Patterson and Hennessey, Computer Organization & Design: The Hardware/Software Interface (5th edition), Morgan Kaufmann, 2014, ISBN 978-0-12-407726-3 .
Publisher Website: Supplemental Material
Selected Chapters (noted in lecture notes) from the online text Operating Systems in Three Easy Steps, Remzi H. Aprpaci-Dusseau and Andrea C. Arpaci-Dusseau.

Course Syllabus Syllabus
Study Guide: Course Study Guide

For information about a specific semester, please refer to the class page for that semester provided by the instructor.


Module Lecture Reading (Note Appendices are found on the CD) Notes/Additional References Examples and Practice Problems
 1 Overview (pptx, pdf) and  Review (pptx, pdf) (ECE 2035 and ECE 2020) Ch. 1.1-1.4, 1.7-1.8  Example Review 2020-DP-Examples
 2  ISA & Encodings (pptx, pdf)
Program Assembly (pptx, pdf)
Ch. 2.1, Figure 2.1, 2.2 – 2.7
(Much of the preceding should be a review from ECE 2035) Figure 2.15. 2.10,2.16, 2.17  Reference: Appendix A1-A3, A5, A9, A10

Class Resources Page

Handy Wikipedia Ref

Example Code Segments: Arithmetic, Logical, Data. Constants

Some Program Encoding Examples (pdf)

Sample Problems & Solutions

 3   Single Cycle Datapath (pptx, pdf)  Single Cycle: Section 4.1-4.4, Appendices B.7, B.8,
B.11, D.2

Sample Problems & Solutions for both Single and Multicycle datapaths

Learning Exercise: Single Cycle Datapath: Code, Tutorial, and Documentation can be found on the class Resources page


  Multicycle Datapath (pptx, pdf)


 Multi-Cycle: Appendices A.7, D.3, D.4, D.5 Tutorial Slides on VHDL can be found here Learning Exercise: Multi Cycle Datapath: Code, Tutorial, and Documentation can be found on the class Resources page
 5   Performance (pptx, pdf)  Ch. 1.6 Practice problems can be found in the set associated with Module 3
 6   Pipelined Datapath (pptx, pdf)  Sections 4.5 – 4.9

Sample Problems & Solutions

Pipelined Datapath:  Code and documentation for the base model can be found on the Resources page

 7   Caches and the Memory Hierarchy (pptx, pdf)
Virtual Memory (pptx, pdf)
 Section 5.2, 5.3, 5.4, 5.8, 5.9 (Caches)
Section 5-7 (VM)
Sample Problems &
 8   Energy of Computation – Basics (pptx, pdf)
 9   Power Management (pptx, pdf)

  Processes & Scheduling (pptx, pdf)


 11   Concurrency (pptx, pdf)   Sections 6.1-6.5 Some Additional SSE Examples:SSE1, SSE2.
Handy Wikipedia Ref for SSE
SSE Tutorial
 12   I/O (ppt, pdf) Useful links for PCI Express, HyperTransport, Quickpath
 13   Networks (pptx, pdf)